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EM MICROELECTRONIC - MARIN SA
EM6323/24
Reset Circuit with Manual Reset and Watchdog
Description
The EM6323/24 are low power, high precision reset ICs featuring a manual reset and a watchdog inputs. They have different threshold voltages and several timeout reset periods (tPOR) and watchdog timeout periods (tWD) for maximum flexibility in the application. EM6323 has a manual reset ( MR with internal pull-up) and a watchdog input pins. EM6324 has only a watchdog input pin (WDI). The watchdog function can be disabled by driving WDI with a three-state driver or by leaving WDI unconnected. This is useful when the MCU is in sleep mode. Small SOT23-5L package as well as ultra-low supply current of 3.8A make the EM6323 and the EM6324 an ideal choice for portable and battery-operated devices.
Features
! ! ! ! ! ! !
Ultra-low supply current of 3.8A (VDD=3.3V) Operating temperature range: -40C to +125C 1.5% reset threshold accuracy 11 reset threshold voltages VTH: 4.63V, 4.4V, 3.08V, 2.93V, 2.63V, 2.2V, 1.8V, 1.66V, 1.57V, 1.38V, 1.31V 200ms reset timeout period (1.6ms, 25ms, 1600ms on request) 1.6s watchdog timeout period (6.2ms, 102ms, 25.6s on request) 3 reset output options: Active-low RESET push-pull Active-low RESET open-drain Active-high RESET push-pull Detection of microcontroller in sleep mode
Typical Application
VDD
VDD RESET RESET
*
VDD RESET RESET
!
Applications
! ! ! ! ! ! !
EM632x
MR GND WDI
MPU, DSP
I/O GND
GND * REXT for open-drain version only
Fig. 1
Block Diagram
VDD
Oscillator
Workstations Point of sales (POS) Personal computers Routers, hubs and switches Handheld GPS Vending machines and ATM Automotive systems
Pin Configuration
RESET RESET
+
Voltage Reference
-
Reset Logic + Timer
EM6323
RESET GND MR 1 2 3
(manual reset, watchdog)
5 VDD
EM6324
push-pull/open-drain
(watchdog)
5 VDD
RESET GND
EM6323
MR GND WDI
Transition Detector
Filter
2 3
EM6324
1
4
WDI
RESET
push-pull
4
WDI
Watchdog Logic + Timer
SOT23-5
Fig. 2
top view
SOT23-5
top view
Fig. 3
Pin Description
SOT23-5L EM6323 EM6324 1 2 3 4 5 1 2 3 4 5 Name
RESET
Function Active-low RESET output (push-pull or open-drain) Ground Manual Reset input with an internal pull-up 30k resistor. Reset remains active as long as MR is low and for tPOR after returns high. MR can be driven with a CMOS output or shorted to ground with a switch Active-high RESET output (push-pull) Watchdog input. WDI must be driven with a CMOS output. If the microcontroller I/O is put in a high impedance condition, the circuit will detect this condition as a microcontroller in sleep mode and prevent its watchdog from timing out Supply Voltage (5.5V max.)
GND
MR
RESET WDI VDD
Copyright (c) 2006, EM Microelectronic-Marin SA 03/06 - rev.H
1
www.emmicroelectronic.com
EM6323/24
Ordering Information
EM6323 L X SP5B - 2.9 +
Part Number: EM6323 = manual reset & watchdog EM6324 = watchdog Delays tPOR & tWD : tPOR [ms] EM6323/24: 1.6 25 200 1600 6.2 A B C D 102 E F G H 1600 J K L M 25600 N P Q R ("L" is the standard version") tWD [ms] RoHS Compliance: + = lead-free/green mold compliant [blank] = leaded Reset Threshold Voltage: 1.3 = 1.31V 1.4 = 1.38V 1.6 = 1.57V 1.7 = 1.66V 1.8 = 1.80V 2.2 = 2.20V 2.6 = 2.63V 2.9 = 2.93V 3.1 = 3.08V 4.4 = 4.40V 4.6 = 4.63V
Package: SP5B = 5-pin SOT23-5, tape&reel, 3000 pcs
Reset Output Type: X = Active-low /RESET push-pull (Active-high RESET push-pull also for EM6324) Y = Active-low /RESET open-drain (Active-high RESET push-pull also for EM6324) Z = Active-high RESET push-pull (EM6323 only)
Note:
subject to availability (see standard versions list below). Please give complete Part Number when ordering
Standard Versions (Top Marking)
Threshold Voltage 2.6V 2.63V 2.63V 2.93V 2.93V 3.08V 2.93V 2.93V 3.1V 3.1V 4.40V 4.40V 2.9V 1.38V
1) 2)
Delay (tPOR)/ Watchdog timer (tWD) 200ms/1600ms 200ms/1600ms 200ms/1600ms 200ms/1600ms 200ms/1600ms 200ms/1600ms 200ms/1600ms 200ms/1600ms 200ms/1600ms 200ms/1600ms 200ms/1600ms 200ms/1600ms 200ms/1600ms 200ms/25600ms
Output Type Active-high push-pull RESET Active-low push-pull RESET Active-low push-pull RESET Active-low push-pull RESET Active-low push-pull RESET Active-low push-pull RESET Active-low open-drain RESET Active-low open-drain RESET Active-low open-drain RESET Active-low push-pull RESET Active-low push-pull RESET Active-low push-pull RESET Active-low open-drain RESET Active-low push-pull RESET
Package SOT23-5L SOT23-5L SOT23-5L SOT23-5L SOT23-5L SOT23-5L SOT23-5L SOT23-5L SOT23-5L SOT23-5L SOT23-5L SOT23-5L SOT23-5L SOT23-5L
Part Number EM6323LZSP5B-2.6 EM6323LXSP5B-2.6 EM6323LXSP5B-2.6+ EM6323LXSP5B-2.9 EM6323LXSP5B-2.9+ EM6323LXSP5B-3.1 EM6323LYSP5B-2.9 EM6323LYSP5B-2.9+ EM6323LYSP5B-3.1 EM6323LXSP5B-3.1 EM6324LXSP5B-4.4 EM6324LXSP5B-4.4+ EM6324LYSP5B-2.9 EM6324QXSP5B-1.4
Top Top Marking 1) with 4 Marking 2) characters APL5 APLG KF## BPLG APLH K0## BPLH APLJ APLU K6## BPLU APLV APLJ AQMK K9## BQMK AQLU AQQB
Top marking is standard from 2006. No bottom marking exists. Where ## refers to the lot number (EM internal reference only) Top marking with 4 characters is standard from 2003. For lead-free/green mold (RoHS) parts, the first letter of top marking with 4 characters begins with letter "B" instead of letter "A". Bottom marking indicates the lot number.
Standard Versions (samples)
Part Number EM6323LXSP5B-2.6+ EM6323LXSP5B-2.9+ Part Number EM6323LYSP5B-2.9+ EM6324LXSP5B-4.4+
Sample stock is generally held on standard versions only. Non standard versions have a 30,000 pieces minimum order quantity. Please contact factory for other versions not shown here and for availability of non standard versions.
Copyright (c) 2006, EM Microelectronic-Marin SA 03/06 - rev.H 2 www.emmicroelectronic.com
EM6323/24
Absolute Maximum Ratings
Parameter
Voltage at VDD to GND Minimum voltage at any signal pin Maximum voltage at any signal pin
Handling Procedures
Symbol
VDD VMIN VMAX VESD TMAX TSTG
Conditions
-0.3V to +6V GND - 0.3V VDD + 0.3V 2000V 250C x 10s -65C to +150C
Electrostatic discharge max. to MIL-STD-883C method 3015.7 with ref. to VSS
Max. soldering conditions Storage Temperature Range
This device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the voltage range. Unused inputs must always be tied to a defined logic voltage level.
Operating Conditions
Parameter
Supply voltage Operating Temperature Input transition rise and fall rate on MR and WDI
Stresses above these listed maximum ratings may cause permanent damages to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction.
Symbol Min Max Unit
VDD TA tR/tF 0.9 5.5 V -40 +125 C 100 ns/V
Electrical Characteristics
Unless otherwise specified: VDD= 0.9V to 5.5V, TA=-40C to +125C (note 1). Parameter Symbol Conditions
VDD=1.5V Supply current (note 2) IDD VDD=3.3V VDD=5.0V EM6323/24 - 1.3 +25C -40C to +125C +25C -40C to +125C +25C -40C to +125C +25C -40C to +85C -40C to +125C +25C -40C to +85C -40C to +125C +25C -40C to +85C -40C to +125C +25C -40C to +85C -40C to +125C +25C -40C to +85C -40C to +125C +25C -40C to +85C -40C to +125C +25C -40C to +85C -40C to +125C +25C -40C to +85C -40C to +125C +25C -40C to +85C -40C to +125C +25C -40C to +85C -40C to +125C +25C -40C to +85C -40C to +125C
Min
1.290 1.245 1.221 1.359 1.311 1.286 1.546 1.492 1.463 1.635 1.577 1.547 1.773 1.710 1.678 2.167 2.090 2.050 2.591 2.499 2.451 2.886 2.784 2.731 3.034 2.926 2.871 4.334 4.180 4.101 4.561 4.399 4.315
Typ
2.4 3.86 5.89 1.31
Max
4.4 6.8 6.1 9.9 8.6 11.6 1.330 1.382 1.387 1.401 1.456 1.461 1.594 1.656 1.663 1.685 1.751 1.758 1.827 1.899 1.906 2.233 2.321 2.330 2.669 2.775 2.785 2.974 3.091 3.103 3.126 3.249 3.262 4.466 4.642 4.660 4.699 4.885 4.903
Unit
A
EM6323/24 - 1.4
1.38
EM6323/24 - 1.6
1.57
EM6323/24 - 1.7
1.66
EM6323/24 - 1.8 Threshold voltage (note 3)
1.80
VTH
EM6323/24 - 2.2
2.20
V
EM6323/24 - 2.6
2.63
EM6323/24 - 2.9
2.93
EM6323/24 - 3.1
3.08
EM6323/24 - 4.4
4.40
EM6323/24 - 4.6
4.63
Note 1: Production tested at +25C only. Over temperature limits are guaranteed by design, not production tested. Note 3: Threshold voltage is specified for VDD falling.
Copyright (c) 2006, EM Microelectronic-Marin SA 03/06 - rev.H
3
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EM6323/24
Electrical Characteristics
(continued)
Unless otherwise specified: VDD= 0.9V to 5.5V, TA=-40C to +125 C (note 1).
Parameter
Threshold hysteresis
Symbol
VHYS
Conditions
TA=+25C EM6323/24 C-G-L-Q VDD from 0V to VTH (typ)+15% TA= +25C (note 2 and 4) EM6323/24 A-E-J-N EM6323/24 B-F-K-P EM6323/24 D-H-M-R
Min
160 0.7 20 1280
2 0.8 2 4 -
Typ
2.1%*VTH 200 1.56 25 1600
70 1600 6.25 100 25600 18 8.3 0.3 30
Max
240 3.8 30 1920
255 0.3 0.3 0.35 0.3 0.3 0.35 0.5 0.3*VDD 1920 7.5 120 30720 0.3*VDD 74
Unit
V
Reset timeout period
tPOR
ms
Propagation delay time VDD to RESET (RESET) delay
Open-drain RESET output Voltage tP
VDD drops from VTH (typ)+0.2V to VTH (typ)-0.2V (note 2). TA= +25C VDD>1V IOL=100A IOL=1.5mA IOL=3mA IOL=100A IOL=1.5mA IOL=3mA IOH=-30A IOH=-1.5mA IOH=-3mA
s
VOL
VDD>2.5V VDD>5V VDD>1V
V
VOL Push-pull RESET / RESET Output voltage VOH Output leakage current ILEAK VWDI low VWDI high tWP
VDD>2.5V VDD>5V VDD>1.1V VDD>2.5V VDD>5V
V
Only for EM6323/24_Y (open-drain)
A
V V
WATCHDOG INPUT (WDI)
WDI Input low WDI Input high Pulse width at WDI TA= +25C EM6323/24 J-K-L-M Watchdog timeout period tWD (note 6) EM6323/24 A-B-C-D EM6323/24 E-F-G-H EM6323/24 N-P-Q-R High-level Input Current Low-level Input Current IIH IIL VMRT low VMRT high tMD tPMD RMR TA=-40C to +125C TA= +25C WDI connected to VDD, TA= +25C WDI connected to GND, TA= +25C 0.7*VDD 1 1280 5 80 20480 0.7*VDD 1 7
s
ms
A A
V V
MANUAL RESET ( MR ) - EM6323 only
MR Input low MR Input high MR to Reset delay
Pulse width at MR (note 5)
s s
k
MR Internal Pull-up resistor
Production tested at +25C only. Over temperature limits are guaranteed by design, not production tested. WDI, MR and RESET (RESET) open. Threshold voltage is specified for VDD falling. Standard version for tPOR is 200ms (typ). Other option (1.6ms, 25ms, 1600ms) are available by mask option and upon minimum order quantity. Please contact EM sales. Note 5: Pulse width must be greater than 1s to ensure the RESET (RESET) to go active. Note 6: Standard version for tWD is 1600ms (typ). Other option (6.2ms, 102ms, 25.6s) are available by mask option and upon minimum order quantity. Please contact EM sales.
Note 1: Note 2: Note 3: Note 4:
Copyright (c) 2006, EM Microelectronic-Marin SA 03/06 - rev.H
4
www.emmicroelectronic.com
EM6323/24
Timing Waveforms
VDD VTH
tSEN VHYS Overdrive
0.9V t logic "1" MR logic "0" t logic "1" RESET logic "0" t logic "1" RESET logic "0" t
Fig. 4
tPMD
tPOR
tMD
tP
tPOR
logic "1" WDI logic "0"
tWP tWD tWD
t logic "1" RESET logic "0" t logic "1" RESET logic "0" t
Fig. 5
tPOR
Note 7: tSEN = Maximum Transient Duration. Please refer to figure on the next page. Note 8: Overdrive = VTH -VDD. Please refer to figure on the next page.
Copyright (c) 2006, EM Microelectronic-Marin SA 03/06 - rev.H
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EM6323/24
Typical Operating Characteristics
(Typical values are at TA=+25C unless otherwise noted. WDI, MR , RESET and RESET open.)
9 8 7 6 5 [ uA ] 4 3 2 1 0 -50 -25 0 25 50 [ C ] 75 100 125
VDD 3 . 3 V VDD 5 . 0 V
6% 4% 2% 0% -2%
VDD 1. 5 V
-4% -6% -50 -25 0 25 50 [ C ] 75 100 125
Fig. 6
Fig. 7
IDD vs. Temperature
Threshold Voltage Variation vs. Temperature (normalized)
160% 140% 120% 100% 80% 60% -50 -25 0 25 50 [ C ] 75 100 125
Fig. 8
160%
tPOR (C) tPOR (25C)
140% 120% 100% 80% 60% -50 -25 0 25 50 [ C ]
tWD (C) tWD (25C)
75
100
125
Fig. 9
Reset Timeout Period tPOR vs. Temperature (normalized with respect to tPOR 25C)
Watchdog Timeout Period tWD vs. Temperature (normalized with respect to tWD 25C)
Copyright (c) 2006, EM Microelectronic-Marin SA 03/06 - rev.H
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EM6323/24
Typical Operating Characteristics
(Typical values are at TA=+25C unless otherwise noted. WDI, MR , RESET and RESET open.)
120 100 80 [ us ] 60 40 20 0 -50 120 100 80 [ us ] 60 40 20 0 -25 0 25 50 [ C ] 75 100 125
Fig. 10
Reset occurs above this line
1
10
[ mV ]
100
1000
Fig. 11
Propagation Time tPHL vs. Temperature
Maximum Transient Duration tSEN vs. Overdrive VTH-VD
250 225 200
[ ns ]
350 300 250 [ ns ] 200 150 100 -50
175 150 125 100 -50 -25 0 25
[ C ]
50
75
100 125
Fig. 12
-25
0
25 50 [ C ]
75
100
125
Watchdog Input Pulse Width tWP vs. Temperature
Fig. 13
Manual Reset Pulse Width tPMD vs. Temperature
Copyright (c) 2006, EM Microelectronic-Marin SA 03/06 - rev.H
7
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EM6323/24
Functional Description
VDD MR WDI
High Impedance
RESET t < tWD tPOR t > tWD tPOR tPOR
Fig. 14
Reset Outputs
A microprocessor (P) reset input starts the P in a known state. The EM6323/24 P supervisory circuits assert a reset to prevent code-execution errors during power-up, power-down, and brownout conditions. RESET is guaranteed to be a logic low for VDD down to 0.9V. Once VDD exceeds the reset threshold, an internal timer keeps RESET low for the specified reset timeout period (tPOR); after this interval, RESET returns high. If a brownout condition occurs (VDD dips below the reset threshold), RESET goes low. Each time RESET is asserted it stays low for the reset timeout period. Any time VDD goes below the reset threshold the internal timer restarts. RESET is the inverse of RESET.
Manual Reset Input (EM6323 only)
A logic low on MR asserts a reset. Reset remains asserted while MR is low, and for tPOR (200ms nominal for EM6323 C-G-L-Q) after it returns high. MR has an internal 30k pull-up resistor, so it can be left open if unused. This input can be driven with CMOS logic levels or with open-drain outputs. Connect a normally open momentary switch from MR to VSS to create a manualreset function; debounce circuitry is integrated. If MR is driven from long cable or the device is used in a noisy environment, connect a 0.1F capacitor from MR to VSS to provide additional noise immunity (stronger external additional pull-up resistor can also be added).
Copyright (c) 2006, EM Microelectronic-Marin SA 03/06 - rev.H
8
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EM6323/24
Watchdog Input
If the watchdog timer has not been cleared within tWD (1.6s typ.), reset asserts. The internal 1.6s timer is cleared by either a reset pulse or by toggling WDI. While reset is asserted, the timer remains cleared and does not count. As soon as reset is released, the timer starts counting. If the microcontroller I/O connected to WDI is put in a high impedance condition, the circuit will detect this condition as a microcontroller in sleep mode and prevent its watchdog from timing out. To monitor a high impedance or a three state condition on WDI, the watchdog input is internally driven low during the first 15/16 of the watchdog timeout period and high for the last 1/16 of the watchdog timeout period. When WDI is left unconnected, this internal driver clears the 1.6s timer every 1.5s. When WDI is three-stated or unconnected, the maximum allowable leakage current is 0.5A. To minimized the overall system power consumption and therefore for a minimum watchdog input current leave WDI low for the majority of the watchdog timeout period, pulsing it low-high-low once within the first 15/16 of the watchdog timeout period to reset the watchdog timer. If WDI is externally driven high for the majority of the timeout period, up to 35A can flow into WDI. Meanwhile when the microcontroller is not in sleep mode, the output of the microcontroller which drives WDI has to be strong enough to fight the 35A.
VDD
VDD RESET
1/16 tWD
Pullup
WDI Pullup OFF
ON
OFF
WDI
15/16 tWD
Transition Detector
Watchdog Logic + Timer
WDI Pulldown ON
OFF
ON
tPOR
15/16 tWD tWD
1/16 tWD
GND
Pulldown
Fig. 15
Fig. 16
WDI Input Timing Diagram
WDI Input Stage Block Schematic
15.0 12.0 9.0 [ uA ] 6.0 3.0 0.0 -50
25.0 20.0 15.0
[ uA ]
10.0 5.0 0.0
-25 0 25 50 75 100 125
-50
-25
0
25
50
75
100 125
[ C ]
Fig. 17
[ C ]
Fig. 18
WDI Input Current Low-level IIL vs. Temperature (VDD=5.5V)
WDI Input Current High-Level IIH vs. Temperature (VDD=5.5V)
Copyright (c) 2006, EM Microelectronic-Marin SA 03/06 - rev.H
9
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EM6323/24
Package Information
D
A1 A2 A
SOT23-5L
E1
C L
b e
SYM BOL A A1 A2 b C D E E1 e e1 L
E
M IN 0.90 0.05 0.90 0.35 0.08 2.80 2.60 1.50
e1
TYP M AX 1.30 1.45 0.08 0.15 1.15 1.30 0.50 0.20 2.90 3.00 2.80 3.00 1.75 0.95 1.90 0.45
Dimensions are in mm
Fig. 19
Traceability for small packages
Due to the limited space on the package surface, the bottom marking contains a limited number of characters that provide only partial information for lot traceability. Full information for complete traceability is however provided on the packing labels of the product at delivery from EM. It is highly recommended that the customer insures full lot traceability of EM product in his final product.
EM Microelectronic-Marin SA (EM) makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in EM's General Terms of Sale located on the Company's web site. EM assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of EM are granted in connection with the sale of EM products, expressly or by implications. EM's products are not authorized for use as components in life support devices or systems.
Product qualification is performed according to internal EM quality standards for industrial products. For any special requirement (eg. automotive grade) please contact EM Microelectronic-Marin S.A.
Copyright (c) 2006, EM Microelectronic-Marin SA 03/06 - rev.H
10
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